Due to their high breakdown voltage and compatibility with CMOS processes, lateral double diffusion metal-oxide-semiconductor (LDMOS) transistors have been widely used in power electronic devices. Comparing with a conventional CMOS device, an LDMOS transistor may have a relatively long drifting region between the source region and the drain region. The relatively long drifting region may be used to withstand a voltage drop when the LDMOS transistor is connected with a high voltage, and a high breakdown voltage may be obtained.
FIG. 1 illustrates an existing N-type LDMOS transistor. As shown in FIG. 1, the LDMOS transistor includes a P-type substrate 11, a P-type well region 12 in the substrate 11, a dielectric layer 16 on the well region 12, a gate 17 on the dielectric layer 16 and a sidewall spacer 18 around the dielectric layer 16 and the gate 17.
The LDMOS transistor also includes a drifting region 13 at one side of the gate 17 and a drain region 151 in the drifting region 13. The drifting region 13 and the gate 17 partially overlap along a direction vertical to the substrate 11.
Further, the LDMOS transistor includes an isolation structure 14 in the drifting region 13. The drain region 151 is at the outer side of the isolation structure 14. The isolation structure 14 and the gate 17 partially overlap along a direction vertical to the substrate 11. The overlap part of the isolation structure 14 and the gate 17 is smaller than the overlap part of the drifting region 13 and the gate 17.
Referring to FIG. 1, when the LDMOS transistor is turned on, a voltage may be applied between the drain region 151 and a source region 152, a current may flow from the source region 152 to the drain region 151 through the P-type well region 12 and the drifting region 13, and the current may accumulate in the drain region 151. Because of the existence of the isolation structure 14, an electric field distribution in the drifting region 13 may be changed such that the isolation structure 14 may withstand a relatively high electric field. Thus, a relatively high breakdown voltage may be obtained.
However, the existing LDMOS transistor may occupy a relatively large area of a chip. The disclosed methods, device structures and systems are directed to solve one or more problems set forth above and other problems.